1. Field of Invention
The present invention generally relates to a method for fabricating semiconductor devices, and more particularly to a method for fabricating a high-voltage semiconductor device.
2. Description of Related Art
High-voltage semiconductor devices are typically fabricated by reducing the doping concentration of drift regions to increase the breakdown voltage. However, the current-driving performance is also degraded by doing so. Also, a latch up capability of a device needs to be commensurate with high-voltage applications. Although the layout rule can be relaxed to improve the latch up capability, extra area is required for fabricating, the device.
Conventionally, the high-voltage device is fabricated by using an isolation layer to increase the distance between the source/drain regions and the gate, so that the lateral electromagnetic field within the channel can be reduced. Also, drift regions underneath the isolation layer and the grade regions underneath the source/drain regions can be lightly doped to reduce a hot electron effect. In this way, the breakdown voltage at the junctions between the source/drain regions and the substrate can be increased and the leakage current therein can be avoided.
FIGS. 1 to 3 show cross sectional views of a portion of a conventional high-voltage semiconductor device. Referring first to FIG. 1, a P-type lightly-doped substrate 100, N-type lightly-doped regions 101, N-type heavily-doped regions 102, and a gate layer 103 are depicted, in which the N-type heavily-doped regions 102 are the source/drain regions, while the N-type lightly-doped regions 101 are used to increase the breakdown voltage at the junctions between the source/drain regions 102 and the substrate 100.
Referring to FIG. 2, a P-type lightly-doped substrate 110, N-type lightly-doped regions 111, N-type heavily-doped regions 112, spacers 113, and a gate layer 114 are depicted, in which the N-type heavily-doped regions 112 are the source/drain regions, while the N-type lightly-doped regions 111 and the spacers 113 can be used to increase the distance between the source/drain regions 112 and the gate 114.
Referring to FIG. 3, a P-type lightly-doped substrate 120, N-type lightly-doped regions 121, N-type heavily-doped regions 122, field oxide (FOX) layers 123, and a gate layer 124 are depicted, in which the N-type heavily-doped regions 122 are the source/drain regions. while the N-type lightly-doped regions 121 and the FOX layers 123 can be used to increase the junction breakdown voltage between the source/drain regions 122 and the substrate 120.
Generally, the high-voltage semiconductor devices are fabricated by reducing the doping concentration of the drift region to increase the breakdown voltage. However. the current-driving performance is also degraded. Also, the latch up capability of the device needs to be commensurate with high-voltage applications. Although the layout rule can be relaxed to improve the latch up capability, extra area is required for fabricating the device.